Ошибка invalid opcode

Задача такая:

Написать резидентную программу для DOS (TASM), которая устанавливает прерывание, чтобы в 0:1 (ноль часов 1 минута) вывести «Hi»

Программа компилируется, запускается, в нужный момент выводит приветствие, ног тут же падает с ошибкой

Invalid Opcode at 0007 0001 0203 057B 0000 0000 … 0000

Код спрятал в

. (не обращайте внимание на название функции showTime, она просто выводит текст. такое название, потому что в следующей доработке должна выводить время)

I wrote this code for avr atmega328P in assembly language. It turns on and off an LED using a push button, but in proteus I am getting this error:

Invalid opcode 0xFFFF at PC=0x002A

This is my code:

.INCLUDE "M328Pdef.inc"


ldi r16,HIGH(RAMEND)
out SPH, R16
ldi r16,LOW(RAMEND)
out SPL, R16

start:
ldi r16,0xFF
out DDRB,r16
ldi r17,0x00
out DDRD,r17
ldi r21,0x00
ldi r23,0x01

Forever:
in r20,PIND
cp r20,r21
BREQ ledon
cp r20,r23
BREQ ledoff
rjmp Forever


ledon:
ldi r22,0x01
out PORTB,r22 
ret

ledoff:
ldi r24,0x00
out PORTB,r24
ret

Does anyone have a solution for it?

Summary

There is no error when the code is inserted into geth and run.

Can you try inserting your code into geth and see if you still the geth «invalid opcode» error.

From the OPs response in the comment, the «invalid opcode» issue is caused by the timing of the test case.

---

Details

Modified Your Code

I’ve modified your code slightly, changing the // comment into /* ... */ and added a public to your mapping structure:

contract GerenciadorBoletos {

    struct Boleto {
        uint codigoBarra;
        uint codigoBarraDigitavel;
        uint cpfOuCnpjBeneficiario;
        uint cpfOuCnpjPagador;
        uint valorOriginal;
        uint dataVencimento;
    }

    mapping(uint => Boleto) public registroBoletos;

    function inserirBoleto(
        uint codigoBarra,
        uint codigoBarraDigitavel,
        uint cpfOuCnpjBeneficiario,
        uint cpfOuCnpjPagador,
        uint valorOriginal,
        uint dataVencimento
    ) {
        Boleto memory b = Boleto(
            codigoBarra,
            codigoBarraDigitavel,
            cpfOuCnpjBeneficiario,
            cpfOuCnpjPagador,
            valorOriginal,
            dataVencimento
        );

        /* I need to do some validations before store it, but there is no code yet */

        registroBoletos[b.codigoBarra] = b;
    }
}

Running geth

I’m running the Dev blockchain using the following parameters:

geth --datadir /home/user/DevData --dev --nodiscover 
  --mine --minerthreads 1 --port 30301 --maxpeers 0  
  --verbosity 3 --rpc console

Flattened Your Code And Assigned To A Variable

You can use a service like Line Break Removal Tool to strip out your line breaks, or see How to load Solidity source file into geth for some alternatives.

I flattened your code, assigned it to a variable and pasted it into geth:

> var gerenciadorBoletosSource='contract GerenciadorBoletos { struct Boleto { uint codigoBarra; uint codigoBarraDigitavel; uint cpfOuCnpjBeneficiario; uint cpfOuCnpjPagador; uint valorOriginal; uint dataVencimento; } mapping(uint => Boleto) public registroBoletos; function inserirBoleto( uint codigoBarra, uint codigoBarraDigitavel, uint cpfOuCnpjBeneficiario, uint cpfOuCnpjPagador, uint valorOriginal, uint dataVencimento ) { Boleto memory b = Boleto( codigoBarra, codigoBarraDigitavel, cpfOuCnpjBeneficiario, cpfOuCnpjPagador, valorOriginal, dataVencimento ); /* I need to do some validations before store it, but there is no code yet */ registroBoletos[b.codigoBarra] = b; }}'

Compiled Your Code

I compiled your code using the following command:

> var gerenciadorBoletosCompiled = web3.eth.compile.solidity(gerenciadorBoletosSource);

Inserted Your Code Into The Blockchain

I used the following commands to insert your code into the blockchain:

var gerenciadorBoletosContract = web3.eth.contract(gerenciadorBoletosCompiled.GerenciadorBoletos.info.abiDefinition);
var gerenciadorBoletos = gerenciadorBoletosContract.new({from:web3.eth.accounts[0], data: gerenciadorBoletosCompiled.GerenciadorBoletos.code, gas: 1000000}, 
  function(e, contract) {
    if (!e) {
      if(!contract.address) {
        console.log("Contract transaction send: TransactionHash: " + 
          contract.transactionHash + " waiting to be mined...");
      } else {
        console.log("Contract mined! Address: " + contract.address);
        console.log(contract);
      }
    }
  }
)

And waited for the following message:

Contract mined! Address: 0x9e550b10e770b050d6ec9af80c5fdb6540089803

Sent Transaction To Add Data

I copied the main part of your sendTransaction to insert your sample data into the blockchain:

> gerenciadorBoletos.inserirBoleto.sendTransaction(
    9872387128, 987128382, 91289312, 81273818, 50, Date.now() + 3*24*3600,
    {
      from: web3.eth.accounts[0],
      gas: 3000000,
    },
    function(e, result) {
      expect(e).to.not.exist;
      expect(result).to.exist;
      result.should.be.above(0);
    }
  );

And waited for the transaction to be mined.

Inspecting Data After Data Inserted

> gerenciadorBoletos.registroBoletos(9872387128)
[9872387128, 987128382, 91289312, 81273818, 50, 1462459836202]

No Invalid Opcode

I double checked my geth messages and I did not get the «invalid opcode» message.

Exceptions, as described in this article, are a type of interrupt generated by the CPU when an ‘error’ occurs. Some exceptions are not really errors in most cases, such as page faults.

Exceptions are classified as:

• Faults: These can be corrected and the program may continue as if nothing happened.
• Traps: Traps are reported immediately after the execution of the trapping instruction.
• Aborts: Some severe unrecoverable error.

Some exceptions will push a 32-bit «error code» on to the top of the stack, which provides additional information about the error. This value must be pulled from the stack before returning control back to the currently running program. (i.e. before calling IRET)

Name	Vector nr.	Type	Mnemonic	Error code?
Division Error	0 (0x0)	Fault	#DE	No
Debug	1 (0x1)	Fault/Trap	#DB	No
Non-maskable Interrupt	2 (0x2)	Interrupt	—	No
Breakpoint	3 (0x3)	Trap	#BP	No
Overflow	4 (0x4)	Trap	#OF	No
Bound Range Exceeded	5 (0x5)	Fault	#BR	No
Invalid Opcode	6 (0x6)	Fault	#UD	No
Device Not Available	7 (0x7)	Fault	#NM	No
Double Fault	8 (0x8)	Abort	#DF	Yes (Zero)
Coprocessor Segment Overrun	9 (0x9)	Fault	—	No
Invalid TSS	10 (0xA)	Fault	#TS	Yes
Segment Not Present	11 (0xB)	Fault	#NP	Yes
Stack-Segment Fault	12 (0xC)	Fault	#SS	Yes
General Protection Fault	13 (0xD)	Fault	#GP	Yes
Page Fault	14 (0xE)	Fault	#PF	Yes
Reserved	15 (0xF)	—	—	No
x87 Floating-Point Exception	16 (0x10)	Fault	#MF	No
Alignment Check	17 (0x11)	Fault	#AC	Yes
Machine Check	18 (0x12)	Abort	#MC	No
SIMD Floating-Point Exception	19 (0x13)	Fault	#XM/#XF	No
Virtualization Exception	20 (0x14)	Fault	#VE	No
Control Protection Exception	21 (0x15)	Fault	#CP	Yes
Reserved	22-27 (0x16-0x1B)	—	—	No
Hypervisor Injection Exception	28 (0x1C)	Fault	#HV	No
VMM Communication Exception	29 (0x1D)	Fault	#VC	Yes
Security Exception	30 (0x1E)	Fault	#SX	Yes
Reserved	31 (0x1F)	—	—	No
Triple Fault	—	—	—	No
FPU Error Interrupt	IRQ 13	Interrupt	#FERR	No

Exceptions

Faults

Division Error

The Division Error occurs when dividing any number by 0 using the DIV or IDIV instruction, or when the division result is too large to be represented in the destination. Since a faulting DIV or IDIV instruction is very easy to insert anywhere in the code, many OS developers use this exception to test whether their exception handling code works.

The saved instruction pointer points to the DIV or IDIV instruction which caused the exception.

Bound Range Exceeded

This exception can occur when the BOUND instruction is executed. The BOUND instruction compares an array index with the lower and upper bounds of an array. When the index is out of bounds, the Bound Range Exceeded exception occurs.

The saved instruction pointer points to the BOUND instruction which caused the exception.

Invalid Opcode

The Invalid Opcode exception occurs when the processor tries to execute an invalid or undefined opcode, or an instruction with invalid prefixes. It also occurs in other cases, such as:

• The instruction length exceeds 15 bytes, but this only occurs with redundant prefixes.
• The instruction tries to access a non-existent control register (for example, mov cr6, eax).
• The UD instruction is executed.

The saved instruction pointer points to the instruction which caused the exception.

Device Not Available

The Device Not Available exception occurs when an FPU instruction is attempted but there is no FPU. This is not likely, as modern processors have built-in FPUs. However, there are flags in the CR0 register that disable the FPU/MMX/SSE instructions, causing this exception when they are attempted. This feature is useful because the operating system can detect when a user program uses the FPU or XMM registers and then save/restore them appropriately when multitasking.

The saved instruction pointer points to the instruction that caused the exception.

Invalid TSS

An Invalid TSS exception occurs when an invalid segment selector is referenced as part of a task switch, or as a result of a control transfer through a gate descriptor, which results in an invalid stack-segment reference using an SS selector in the TSS.

When the exception occurred before loading the segment selectors from the TSS, the saved instruction pointer points to the instruction which caused the exception. Otherwise, and this is more common, it points to the first instruction in the new task.

Error code: The Invalid TSS exception sets an error code, which is a selector index.

Segment Not Present

The Segment Not Present exception occurs when trying to load a segment or gate which has its `Present` bit set to 0.
However when loading a stack-segment selector which references a descriptor which is not present, a Stack-Segment Fault occurs.

If the exception happens during a hardware task switch, the segment values should not be relied upon by the handler. That is, the handler should check them before trying to resume the new task. There are three ways to do this, according to the Intel documentation.

The saved instruction pointer points to the instruction which caused the exception.

Error code: The Segment Not Present exception sets an error code, which is the segment selector index of the segment descriptor which caused the exception.

Stack-Segment Fault

The Stack-Segment Fault occurs when:

• Loading a stack-segment referencing a segment descriptor which is not present.
• Any PUSH or POP instruction or any instruction using ESP or EBP as a base register is executed, while the stack address is not in canonical form.
• When the stack-limit check fails.

If the exception happens during a hardware task switch, the segment values should not be relied upon by the handler. That is, the handler should check them before trying to resume the new task. There are three ways to do this, according to the Intel documentation.

The saved instruction pointer points to the instruction which caused the exception, unless the fault occurred because of loading a non-present stack segment during a hardware task switch, in which case it points to the next instruction of the new task.

Error code: The Stack-Segment Fault sets an error code, which is the stack segment selector index when a non-present segment descriptor was referenced or a limit check failed during a hardware task switch. Otherwise (for present segments and already in use), the error code is 0.

General Protection Fault

A General Protection Fault may occur for various reasons. The most common are:

• Segment error (privilege, type, limit, read/write rights).
• Executing a privileged instruction while CPL != 0.
• Writing a 1 in a reserved register field or writing invalid value combinations (e.g. CR0 with PE=0 and PG=1).
• Referencing or accessing a null-descriptor.

The saved instruction pointer points to the instruction which caused the exception.

Error code: The General Protection Fault sets an error code, which is the segment selector index when the exception is segment related. Otherwise, 0.

Page Fault

A Page Fault occurs when:

• A page directory or table entry is not present in physical memory.
• Attempting to load the instruction TLB with a translation for a non-executable page.
• A protection check (privileges, read/write) failed.
• A reserved bit in the page directory or table entries is set to 1.

The saved instruction pointer points to the instruction which caused the exception.

Error code

The Page Fault sets an error code:

 31              15                             4               0
+---+--  --+---+-----+---+--  --+---+----+----+---+---+---+---+---+
|   Reserved   | SGX |   Reserved   | SS | PK | I | R | U | W | P |
+---+--  --+---+-----+---+--  --+---+----+----+---+---+---+---+---+

	Length	Name	Description
P	1 bit	Present	When set, the page fault was caused by a page-protection violation. When not set, it was caused by a non-present page.
W	1 bit	Write	When set, the page fault was caused by a write access. When not set, it was caused by a read access.
U	1 bit	User	When set, the page fault was caused while CPL = 3. This does not necessarily mean that the page fault was a privilege violation.
R	1 bit	Reserved write	When set, one or more page directory entries contain reserved bits which are set to 1. This only applies when the PSE or PAE flags in CR4 are set to 1.
I	1 bit	Instruction Fetch	When set, the page fault was caused by an instruction fetch. This only applies when the No-Execute bit is supported and enabled.
PK	1 bit	Protection key	When set, the page fault was caused by a protection-key violation. The PKRU register (for user-mode accesses) or PKRS MSR (for supervisor-mode accesses) specifies the protection key rights.
SS	1 bit	Shadow stack	When set, the page fault was caused by a shadow stack access.
SGX	1 bit	Software Guard Extensions	When set, the fault was due to an SGX violation. The fault is unrelated to ordinary paging.

In addition, it sets the value of the CR2 register to the virtual address which caused the Page Fault.

x87 Floating-Point Exception

The x87 Floating-Point Exception occurs when the FWAIT or WAIT instruction, or any waiting floating-point instruction is executed, and the following conditions are true:

• CR0.NE is 1;
• an unmasked x87 floating point exception is pending (i.e. the exception bit in the x87 floating point status-word register is set to 1).

The saved instruction pointer points to the instruction which is about to be executed when the exception occurred. The x87 instruction pointer register contains the address of the last instruction which caused the exception.

Error Code: The exception does not push an error code. However, exception information is available in the x87 status word register.

Alignment Check

An Alignment Check exception occurs when alignment checking is enabled and an unaligned memory data reference is performed. Alignment checking is only performed in CPL 3.

Alignment checking is disabled by default. To enable it, set the CR0.AM and RFLAGS.AC bits both to 1.

The saved instruction pointer points to the instruction which caused the exception.

SIMD Floating-Point Exception

The SIMD Floating-Point Exception occurs when an unmasked 128-bit media floating-point exception occurs and the CR4.OSXMMEXCPT bit is set to 1. If the OSXMMEXCPT flag is not set, then SIMD floating-point exceptions will cause an Undefined Opcode exception instead of this.

The saved instruction pointer points to the instruction which caused the exception.

Error Code: The exception does not push an error code. However, exception information is available in the MXCSR register.

Traps

Debug

The Debug exception occurs on the following conditions:

• Instruction fetch breakpoint (Fault)
• General detect condition (Fault)
• Data read or write breakpoint (Trap)
• I/O read or write breakpoint (Trap)
• Single-step (Trap)
• Task-switch (Trap)

When the exception is a fault, the saved instruction pointer points to the instruction which caused the exception. When the exception is a trap, the saved instruction pointer points to the instruction after the instruction which caused the exception.

Error code: The Debug exception does not set an error code. However, exception information is provided in the debug registers (CPU_Registers_x86#Debug_Registers).

Breakpoint

A Breakpoint exception occurs at the execution of the INT3 instruction. Some debug software replace an instruction by the INT3 instruction. When the breakpoint is trapped, it replaces the INT3 instruction with the original instruction, and decrements the instruction pointer by one.

The saved instruction pointer points to the byte after the INT3 instruction.

Overflow

An Overflow exception is raised when the INTO instruction is executed while the overflow bit in RFLAGS is set to 1.

The saved instruction pointer points to the instruction after the INTO instruction.

Aborts

Double Fault

A Double Fault occurs when an exception is unhandled or when an exception occurs while the CPU is trying to call an exception handler. Normally, two exception at the same time are handled one after another, but in some cases that is not possible. For example, if a page fault occurs, but the exception handler is located in a not-present page, two page faults would occur and neither can be handled. A double fault would occur.

A double fault will always generate an error code with a value of zero.

The saved instruction pointer is undefined. A double fault cannot be recovered. The faulting process must be terminated.

In several starting hobby OSes, a double fault is also quite often a misdiagnosed IRQ0 in the cases where the PIC hasn’t been reprogrammed yet.

Machine Check

The Machine Check exception is model specific and processor implementations are not required to support it. It uses model-specific registers to provide error information. It is disabled by default. To enable it, set the CR4.MCE bit to 1.

Machine check exceptions occur when the processor detects internal errors, such as bad memory, bus errors, cache errors, etc.

The value of the saved instruction pointer depends on the implementation and the exception.

Triple Fault

Main article: Triple Fault

The Triple Fault is not really an exception, because it does not have an associated vector number. Nonetheless, a triple fault occurs when an exception is generated when attempt to call the double fault exception handler. It results in the processor resetting. See the main article for more information about possible causes and how to avoid them.

Selector Error Code

 31         16   15         3   2   1   0
+---+--  --+---+---+--  --+---+---+---+---+
|   Reserved   |    Index     |  Tbl  | E |
+---+--  --+---+---+--  --+---+---+---+---+

	Length	Name	Description
E	1 bit	External	When set, the exception originated externally to the processor.
Tbl	2 bits	IDT/GDT/LDT table	This is one of the following values: Value Description 0b00 The Selector Index references a descriptor in the GDT. 0b01 The Selector Index references a descriptor in the IDT. 0b10 The Selector Index references a descriptor in the LDT. 0b11 The Selector Index references a descriptor in the IDT.
Index	13 bits	Selector Index	The index in the GDT, IDT or LDT.

Legacy

The following exceptions happen on outdated technology, but are no longer used or should be avoided. They apply mostly to the intel 386 and earlier, and might include CPUs from other manufacturers around the same time.

FPU Error Interrupt

In the old days, the floating point unit was a dedicated chip that could be attached to the processor. It lacked direct wiring of FPU errors to the processor, so instead it used IRQ 13, allowing the CPU to deal with errors at its own leasure. When the 486 was developed and multiprocessor support was added, the FPU was embedded on die and a global interrupt for FPUs became undesirable, instead getting an option for direct error handling. By default, this method is not enabled at boot for backwards compatibility, but an OS should update the settings accordingly.

Coprocessor Segment Overrun

When the FPU was still external to the processor, it had separate segment checking in protected mode. Since the 486 this is handled by a GPF instead like it already did with non-FPU memory accesses.

See Also

External Links

• Intel® 64 and IA-32 Architectures Software Developer’s Manual, Volume 3 (System Programming Guide), Chapter 6 (Interrupt and exception handling)

	Форум РадиоКот • Просмотр темы — Проблема с запуском atmega128 в протеусе Сообщения без ответов | Активные темы Часовой пояс: UTC + 3 часа Список форумов » Микроконтроллеры и ПЛИС » AVR ПРЯМО СЕЙЧАС:    Страница 1 из 1  [ Сообщений: 7 ]    Для печати Предыдущая тема | Следующая тема  Автор Сообщение Заголовок сообщения: Проблема с запуском atmega128 в протеусе Добавлено: Сб сен 07, 2013 16:00:30  Первый раз сказал Мяу! Зарегистрирован: Ср май 22, 2013 19:18:17 Сообщений: 29 Рейтинг сообщения: 0 Приветствую! У меня такая проблема, запускаю в Протеусе Atmega128 и выдает такую ошибку invalid opcode 0xffff at pc=0x11f6 ,есть какие нибудь идеи на счет этой ошибки _________________ Если долго мучиться, да что нибудь получится! Вернуться наверх   Профиль   Реклама EDSedov Заголовок сообщения: Re: Проблема с запуском atmega128 в протеусе Добавлено: Сб сен 07, 2013 20:11:45  Вымогатель припоя Карма: 10 Рейтинг сообщений: 64 Зарегистрирован: Вс ноя 04, 2012 20:20:13 Сообщений: 573 Откуда: Рязань Рейтинг сообщения: 0 dir.as писал(а): invalid opcode 0xffff at pc=0x11f6 Переводится «поврежденный код», прошивку проверьте, можно даже на других контроллерах(с подстройкой кода программы под них) и/или симуляторах. _________________ Выше нос! жизнь прекрасна! Вернуться наверх   Профиль   Реклама dir.as Заголовок сообщения: Re: Проблема с запуском atmega128 в протеусе Добавлено: Вс сен 08, 2013 09:52:26  Первый раз сказал Мяу! Зарегистрирован: Ср май 22, 2013 19:18:17 Сообщений: 29 Рейтинг сообщения: 0 вот прошивка может что нибудь подскажет atmega128, кварц на 16mhz, boot loader 2048 Вложения: Комментарий к файлу: пошивка lcd.hex [90.01 KiB] Скачиваний: 505 _________________ Если долго мучиться, да что нибудь получится! Вернуться наверх   Профиль   Реклама PCBWay — всего $5 за 10 печатных плат, первый заказ для новых клиентов БЕСПЛАТЕН Сборка печатных плат от $30 + БЕСПЛАТНАЯ доставка по всему миру + трафарет Онлайн просмотровщик Gerber-файлов от PCBWay + Услуги 3D печати EDSedov Заголовок сообщения: Re: Проблема с запуском atmega128 в протеусе Добавлено: Вс сен 08, 2013 11:55:32  Вымогатель припоя Карма: 10 Рейтинг сообщений: 64 Зарегистрирован: Вс ноя 04, 2012 20:20:13 Сообщений: 573 Откуда: Рязань Рейтинг сообщения: 0 А пишите на каком языке, в какой среде разработки? _________________ Выше нос! жизнь прекрасна! Вернуться наверх   Профиль   Реклама Вебинар «Мощные модульные системы питания MEAN WELL 3+N. Новинки и хиты» (22.06.2023) Приглашаем 22 июня на вебинар, посвященный подходу компании MEAN WELL к созданию мощных управляемых систем низковольтного и высоковольтного питания и зарядных установок для промышленного, технологического, телекоммуникационного, медицинского, радиопередающего и другого оборудования, а также для систем альтернативной энергетики. На вебинаре мы рассмотрим новинки и серийную продукцию в концепции «3+N», расскажем об этой концепции и о том, как создать из готовых модулей систему питания мощностью до 360 кВт с напряжением до 380…400 В (постоянного тока). Будут представлены ИП с рециркуляцией энергии для тестового оборудования и модули управления питанием. Подробнее>> Gudd-Head Заголовок сообщения: Re: Проблема с запуском atmega128 в протеусе Добавлено: Пн сен 09, 2013 13:31:41  Друг Кота Карма: 67 Рейтинг сообщений: 994 Зарегистрирован: Чт сен 18, 2008 12:27:21 Сообщений: 18374 Откуда: Столица Мира Санкт-Петербург Рейтинг сообщения: 0 Медали: 1 dir.as писал(а): есть какие нибудь идеи на счет этой ошибки Есть. Вызывается команда (загружается 0x11f6 в РС) из пустого места в МК. _________________ [ Всё дело не столько в вашей глупости, сколько в моей гениальности ] [ Правильно заданный вопрос содержит в себе половину ответа ] Измерить нннада? Вернуться наверх   Профиль   Реклама Реклама Замена DC/DC-преобразователями MORNSUN изделий европейских производителей Третье поколение DC/DC-преобразователей популярного китайского производителя MORNSUN для монтажа на печатную плату не только не уступает по характеристикам изделиям европейских производителей, но и превосходит их по таким параметрам, как напряжение изоляции, рабочий температурный диапазон и максимальная емкость нагрузки. Подробнее>> dir.as Заголовок сообщения: Re: Проблема с запуском atmega128 в протеусе Добавлено: Чт сен 19, 2013 10:49:48  Первый раз сказал Мяу! Зарегистрирован: Ср май 22, 2013 19:18:17 Сообщений: 29 Рейтинг сообщения: 0 если в протеусе ставлю фьюз BOOTRST= programmed то выходит другая ошибка invalid opcode pc=0x1f002 к чему это все и как можно исправить чтоб запустилась _________________ Если долго мучиться, да что нибудь получится! Вернуться наверх   Профиль   Реклама Engineer_Keen Заголовок сообщения: Re: Проблема с запуском atmega128 в протеусе Добавлено: Чт сен 19, 2013 11:02:13  Друг Кота Карма: 32 Рейтинг сообщений: 228 Зарегистрирован: Пт янв 29, 2010 10:27:40 Сообщений: 3828 Откуда: Москва Рейтинг сообщения: 0 Походу HEX тупо обрезан до 32кБ. Поэтому в обоих случаях происходит переход в «пустое» место флеша. Может какое-то ограничение компилятора? Вернуться наверх   Профиль   Показать сообщения за:  Сортировать по:  Вернуться наверх    Страница 1 из 1  [ Сообщений: 7 ]  Часовой пояс: UTC + 3 часа Список форумов » Микроконтроллеры и ПЛИС » AVR Кто сейчас на форуме Сейчас этот форум просматривают: Google [Bot], veso74, warptred12 и гости: 9 Вы не можете начинать темы Вы не можете отвечать на сообщения Вы не можете редактировать свои сообщения Вы не можете удалять свои сообщения Вы не можете добавлять вложения Найти: Перейти: